?2001 fairchild semiconductor corporation hgtd3n60b3s, hgt1s3n60b3s, HGTP3N60B3 rev. b hgtd3n60b3s, hgt1s3n60b3s, HGTP3N60B3 7a, 600v, ufs series n-channel igbts the hgtd3n60b3s, hgt1s3n60b3s and HGTP3N60B3 are mos gated high voltage switching devices combining the best features of mosfets and bipolar transistors. these devices have the high input impedance of a mosfet and the low on-state conduction loss of a bipolar tra nsistor. the much lower on-state voltage drop varies only moderately between 25 o c and 150 o c. the igbt is ideal for many high voltage switching applications operating at moderate frequencies where low conduction losses are essential, such as: ac and dc motor controls, power supplies and drivers for solenoids, relays and contactors. formerly developmental type ta49192. symbol features ? 7a, 600v, t c = 25 o c 600v switching soa capability typical fall time. . . . . . . . . . . . . . . . 115ns at t j = 150 o c short circuit rating low conduction loss packaging jedec to-220ab jedec to-263ab jedec to-252aa ordering information part number package brand hgtd3n60b3s to-252aa g3n60b hgt1s3n60b3s to-263ab g3n60b3 HGTP3N60B3 to-220ab g3n60b3 note: when ordering, use the entire part number. add the suffix 9a to obtain the to-252aa and to-263ab variant in tape and reel, e.g. hgtd3n60b3s9a. c e g c e g collector (flange) g collector (flange) e collector (flange) g e intersil corporation igbt product is co vered by one or more of the following u.s. patents 4,364,073 4,417,385 4,430,792 4,443,931 4,466,176 4,516,143 4,532,534 4,587,713 4,598,461 4,605,948 4,620,211 4,631,564 4,639,754 4,639,762 4,641,162 4,644,637 4,682,195 4,684,413 4,694,313 4,717,679 4,743,952 4,783,690 4,794,432 4,801,986 4,803,533 4,809,045 4,809,047 4,810,665 4,823,176 4,837,606 4,860,080 4,883,767 4,888,627 4,890,143 4,901,127 4,904,609 4,933,740 4,963,951 4,969,027 data sheet december 2001
?2001 fairchild semiconductor corporation hgtd3n60b3s, hgt1s3n60b3s, HGTP3N60B3 rev. b absolute maximum ratings t c = 25 o c, unless otherwise specified hgtd3n60b3s, hgt1s3n60b3s HGTP3N60B3 units collector to emitter voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . bv ces 600 v collector current continuous at t c = 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i c25 7.0 a at t c = 110 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i c110 3.5 a collector current pulsed (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i cm 20 a gate to emitter voltage continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v ges 20 v gate to emitter voltage pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v gem 30 v switching safe operating area at t j = 150 o c (figure 2) . . . . . . . . . . . . . . . . . . . . . . . ssoa 18a at 600v power dissipation total at t c = 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p d 33.3 w power dissipation derating t c > 25 o c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.27 w/ o c reverse voltage avalanche energy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . e arv 100 mj operating and storage junction temperature range . . . . . . . . . . . . . . . . . . . . . . . . t j , t stg -55 to 150 o c maximum lead temperature for soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t l 260 o c short circuit withstand time (note 2) at v ge = 12v. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t sc 5 s short circuit withstand time (note 2) at v ge = 10v. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t sc 10 s caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. notes: 1. pulse width limited by maximum junction temperature. 2. v ce(pk) = 360v, t j = 125 o c, r g = 82 ?. electrical specifications t c = 25 o c, unless otherwise specified parameter symbol test conditions min typ max units collector to emitter breakdown voltage bv ces i c = 250 a, v ge = 0v 600 - - v emitter to collector breakdown voltage bv ecs i c = 10ma, v ge = 0v 20 28 - v collector to emitter leakage current i ces v ce = bv ces t c = 25 o c - - 250 a t c = 150 o c--2.0ma collector to emitter saturation voltage v ce(sat) i c = i c110 , v ge = 15v t c = 25 o c-1.82.1v t c = 150 o c-2.12.5v gate to emitter threshold voltage v ge(th) i c = 250 a, v ce = v ge 4.5 5.4 6.0 v gate to emitter leakage current i ges v ge = 20v - - 250 na switching soa ssoa t j = 150 o c r g = 82 ? v ge = 15v l = 500 h v ce = 600v 18 - - a gate to emitter plateau voltage v gep i c = i c110 , v ce = 0.5 bv ces -7.9 - v on-state gate charge q g(on) i c = i c110 , v ce = 0.5 bv ces v ge = 15v - 18 22 nc v ge = 20v - 21 25 nc current turn-on delay time t d(on)i igbt and diode at t j = 25 o c i ce = i c110 v ce = 0.8 bv ces v ge = 15v r g = 82 ? l = 1mh test circuit (figure 17) -18 - ns current rise time t ri -16 - ns current turn-off delay time t d(off)i - 105 - ns current fall time t fi -70 - ns turn-on energy e on -6675 j turn-off energy (note 3) e off - 88 160 j hgtd3n60b3s, hgt1s3n60b3s, HGTP3N60B3
?2001 fairchild semiconductor corporation hgtd3n60b3s, hgt1s3n60b3s, HGTP3N60B3 rev. b current turn-on delay time t d(on)i igbt and diode at t j = 150 o c i ce = i c110 v ce = 0.8 bv ces v ge = 15v r g = 82 ? l = 1mh test circuit (figure 17) -16 - ns current rise time t ri -18 - ns current turn-off delay time t d(off)i - 220 295 ns current fall time t fi - 115 175 ns turn-on energy e on - 130 140 j turn-off energy (note 3) e off - 210 325 j thermal resistance junction to case r jc - - 3.75 o c/w note: 3. turn-off energy loss (eoff) is defined as the integral of the instantaneous power loss starting at the trailing edge of the i nput pulse and ending at the point where the collector current equals zero (i ce = 0a). all devices were tested per je dec standard no. 24-1 method for measurement of power device turn-off switching loss. this test method p roduces the true total turn-off ener gy loss. turn-on losses incl ude losses due to diode recovery. typical performance curves unless otherwise specified figure 1. dc collector current vs case temperature figure 2. minimum switching safe operating area figure 3. operating frequency vs collector to emitter current figure 4. short circuit withstand time electrical specifications t c = 25 o c, unless otherwise specified (continued) parameter symbol test conditions min typ max units t c , case temperature ( o c) i ce , dc collector current (a) 25 50 75 100 125 150 1 0 3 5 2 4 6 7 v ge = 15v v ce , collector to emitter voltage (v) 10 700 6 0 i ce , collector to emitter current (a) 2 4 300 400 200 100 500 600 8 0 12 14 16 18 20 t j = 150 o c, r g = 82 ? , v ge = 15v, l = 500 h f max , operating frequency (khz) 1 i ce , collector to emitter current (a) 10 246 1 100 8 f max1 = 0.05/(t d(off)i + t d(on)i ) r ?jc = 3.75 o c/w, see notes p c = conduction dissipation (duty factor = 50%) f max2 = (p d - p c )/(e on + e off ) t j = 150 o c, r g = 82 ? , l = 1mh, v ce = 480v 357 200 t c v ge 110 o c 10v 15v 15v 75 o c 110 o c 75 o c10v v ge , gate to emitter voltage (v) i sc , peak short circuit current (a) t sc , short circuit withstand time ( s) 10 11 12 13 14 15 4 6 8 10 14 16 12 15 20 25 30 35 40 45 t sc i sc v ce = 360v, r g = 82 ? , t j = 125 o c hgtd3n60b3s, hgt1s3n60b3s, HGTP3N60B3
?2001 fairchild semiconductor corporation hgtd3n60b3s, hgt1s3n60b3s, HGTP3N60B3 rev. b figure 5. collector to emitter on-state voltage figure 6. collector to emitter on-state voltage figure 7. turn-on energy loss vs collector to emitter current figure 8. turn-off energy loss vs collector to emitter current figure 9. turn-on delay time vs collector to emitter current figure 10. turn-on rise time vs collector to emitter current typical performance curves unless otherwise specified (continued) pulse duration = 250 s duty cycle <0.5%, v ge = 10v t c = -55 o c t c = 150 o c t c = 25 o c 012345 v ce , collector to emitter voltage (v) i ce , collector to emitter current (a) 0 2 4 6 8 678910 14 12 10 duty cycle <0.5%, v ge = 15v pulse duration = 250 s t c = 150 o c t c = -55 o c t c = 25 o c 01234 i ce , collector to emitter current (a) v ce , collector to emitter voltage (v) 0 25 10 15 20 5678910 5 30 e on , turn-on energy loss (mj) 0.5 0.3 i ce , collector to emitter current (a) 0.4 0.2 0.1 0 8 5 23 r g = 82 ? , l = 1mh, v ce = 480v t j = 25 o c, t j = 150 o c, v ge = 10v t j = 25 o c, t j = 150 o c, v ge = 15v 7 6 4 1 0.6 0.7 i ce , collector to emitter current (a) e off , turn-off energy loss (mj) 0.1 0.2 0.3 0.4 0 8 6 4 2 357 1 0.5 0.6 r g = 82 ? , l = 1mh, v ce = 480v t j = 150 o c; v ge = 10v or 15v t j = 25 o c; v ge = 10v or 15v i ce , collector to emitter current (a) t di , turn-on delay time (ns) 10 4 258 1 15 20 25 30 35 40 r g = 82 ? , l = 1mh, v ce = 480v t j = 25 o c, t j = 150 o c, v ge = 10v t j = 25 o c, t j = 150 o c, v ge = 15v 7 6 3 45 i ce , collector to emitter current (a) t ri , rise time (ns) 2 10 30 20 40 50 70 60 368 1 t j = 25 o c, t j = 150 o c, v ge = 10v 80 7 5 4 r g = 82 ? , l = 1mh, v ce = 480v t j = 25 o c, t j = 150 o c, v ge = 15v hgtd3n60b3s, hgt1s3n60b3s, HGTP3N60B3
?2001 fairchild semiconductor corporation hgtd3n60b3s, hgt1s3n60b3s, HGTP3N60B3 rev. b figure 11. turn-off delay time vs collector to emitter current figure 12. fall time vs collector to emitter current figure 13. transfer characteristic figure 14. gate charge waveform figure 15. capacitance vs collector to emitter voltage typical performance curves unless otherwise specified (continued) i ce , collector to emitter current (a) 2 t d(off)i , turn-off delay time (ns) 468 1 100 150 175 250 225 r g = 82 ? , l = 1mh, v ce = 480v t j = 150 o c, v ge = 15v t j = 150 o c, v ge = 10v t j = 25 o c, v ge = 15v t j = 25 o c, v ge = 10v 7 5 3 75 125 200 i ce , collector to emitter current (a) t fi , fall time (ns) 2468 1 60 80 100 120 140 r g = 82 ? , l = 1mh, v ce = 480v t j = 150 o c, v ge = 10v or 15v t j = 25 o c, v ge = 10v or 15v 7 5 3 i ce , collector to emitter current (a) 0 5 10 15 20 25 5 78910 6 v ge , gate to emitter voltage (v) t c = 150 o c t c = 25 o c pulse duration = 250 s 11 12 13 14 15 30 t c = -55 o c q g , gate charge (nc) 20 0 12 15 9 6 3 010 51525 v ge , gate to emitter voltage (v) i g(ref) = 1ma, r l = 171 ? , t c = 25 o c v ce = 200v v ce = 400v v ce = 600v c res v ce , collector to emitter voltage (v) 0 5 10 15 20 25 0 100 c, capacitance (pf) c ies c oes frequency = 1mhz 200 300 400 500 hgtd3n60b3s, hgt1s3n60b3s, HGTP3N60B3
?2001 fairchild semiconductor corporation hgtd3n60b3s, hgt1s3n60b3s, HGTP3N60B3 rev. b figure 16. normalized transient thermal response, junction to case test circuit and waveform figure 17. inductive switching test circui t figure 18. switching test waveforms typical performance curves unless otherwise specified (continued) t 1 , rectangular pulse duration (s) 10 -5 10 -3 10 0 10 1 10 -4 10 -1 10 -2 10 0 z jc , normalized thermal response 10 -1 10 -2 duty factor, d = t 1 / t 2 peak t j = (p d x z jc x r jc ) + t c t 1 t 2 p d single pulse 0.5 0.05 0.2 0.1 0.02 0.01 r g = 82 ? l = 1mh v dd = 480v + - rhrd460 t fi t d(off)i t fi t d(on)i 10% 90% 10% 90% v ce i ce v ge e off e on hgtd3n60b3s, hgt1s3n60b3s, HGTP3N60B3
?2001 fairchild semiconductor corporation hgtd3n60b3s, hgt1s3n60b3s, HGTP3N60B3 rev. b handling precautions for igbts insulated gate bipolar transistors are susceptible to gate- insulation damage by the electro static discha rge of energy through the devices. when handling these devices, care should be exercised to assure that the static charge built in the handler?s body capacitance is not discharged through the device. with proper handling and application procedures, however, igbts are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. igbts can be handled safely if the following basic precauti ons are taken: 1. prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as ?eccosorbd? ld26? or equivalent. 2. when devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. tips of soldering irons should be grounded. 4. devices should never be inserted into or removed from circuits with power on. 5. gate voltage rating - never exceed the gate-voltage rating of v gem . exceeding the rated v ge can result in permanent damage to the oxide layer in the gate region. 6. gate termination - the gates of these devices are essentially capacitors. circuits that leave the gate open- circuited or floating should be avoided. these conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. gate protection - these devices do not have an internal monolithic zener diode from gate to emitter. if gate protection is required an external zener is recommended. operating frequency information operating frequency information for a typical device (figure 3) is presented as a guide for estimating device performance for a specific application. other typical frequency vs collector current (i ce ) plots are possible using the information shown for a typical unit in figures 5, 6, 7, 8, 9 and 11. the operating frequency plot (figure 3) of a typical device shows f max1 or f max2 ; whichever is smaller at each point. the information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. f max1 is defined by f max1 = 0.05/(t d(off)i + t d(on)i ). deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. other definitions are possible. t d(off)i and t d(on)i are defined in figure 18. device turn-off delay can establish an additional frequency limiting condition for an application other than t jm . t d(off)i is important when controlling output ripple under a lightly loaded condition. f max2 is defined by f max2 = (p d - p c )/(e off + e on ). the allowable dissipation (p d ) is defined by p d = (t jm - t c )/r jc . the sum of device switching and conduction losses must not exceed p d . a 50% duty factor was used (figure 3) and the conduction losses (p c ) are approximated by p c =(v ce xi ce )/2. e on and e off are defined in the switching waveforms shown in figure 18. e on is the integral of the instantaneous power loss (i ce x v ce ) during turn-on and e off is the integral of the instantaneous power loss (i ce x v ce ) during turn-off. all tail losses are included in the calculation for e off ; i.e., the collector current equals zero (i ce = 0). hgtd3n60b3s, hgt1s3n60b3s, HGTP3N60B3
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